Never before, so much tools and training programs have been offered for a fraction of what is usually paid for a 1-day course. 

Verilog Computer-Based Training Course: 

With the Verilog CBT you can learn Verilog at your own pace with this comprehensive, up-to-date, and powerful CD-ROM training course and save over 90% of the cost of online courses or single-day seminars. Start at the beginning with the development of Verilog code and the application of HDL-based tools in simulation, synthesis, and testing of digital systems--or jump in anywhere if you already know some of the material. This resource-loaded CD will be an indispensable reference for as long as you use Verilog--and for anyone currently working in this rapidly growing HDL. The CD includes synthesizable templates for common RT-level components and has complete Verilog code for interface devices and arithmetic units such as array multipliers, pipeline dividers and polynomials. The topic of test benches and test bench generation is completely covered in this CD. 

Verilog Computer-Based Training Course CD-ROM features: 
•Everything you need to learn Verilog, in an interactive environment 
•Hundreds of worked examples and self-test problems from easy to complex 
•Test bench for every example, test bench templates for complex circuits 
•License for Mentor’s industry leading Verilog simulation and synthesis tools 
•Altera’s complete PLD design tool including simulation and synthesis 
•Mentor Graphic’s ModelSim Verilog simulators that run all examples 
•Mentor Graphic’s LeonardoSpectrum synthesis tool 
•Software tutorials, as well as tutorials for simulation and synthesis 
•Quick access to the exact model, template, data, syntax, or grammar you need 
•Hard-copy user's manual with detailed study guide 
•Supporting web site with answers to all problems and simulations 
•Projects at the end of each subject and quizzes at the end of topics 

With your purchase you will get tools and programs: 

This is more than just a training program. It contains all that a design engineer or a college student needs for learning Verilog and designing with this fastest growing HDL 

Here is what is on the training CD: 
•Verilog Computer-Based Training software 
•Synthesis manuals and guidelines 
•Tutorials for use of simulation and synthesis tools that are included on the CD 
•Verilog programs and code templates for common designs and testbenches 
•Extendable one-year license for Mentor’s ModelSim simulator 
•Extendable one-year license for Mentor’s LeonardoSpectrum synthesis tool 
•License for Altera’s Quartus II design and PLD programming environment 
•Student version of Aldec’s Active HDL design and simulation environment 
•Schematic capture and block diagram editors and simulators 

Users of Verilog Computer-Based Training Course: 

The course is designed for students and professional engineers at all levels. It is designed for each user's pace and skill level, from novice to advanced. The hard-copy user’s manual shows how users with different skill levels can benefit from this course. 

Who can use this training CD: 
•Those who are new to large scale design and need HDL and design trainings and tools 
•Design engineers requiring advanced synthesis and programming skills and Verilog design tools 
•Modeling engineers requiring advanced Verilog programming techniques 
•Software developers that need all the details of Verilog from timing specification to high-level modeling 
•Students in Logic Design who need schematic capture tools and training in Verilog design and programming environments 
•Students in Computer Architecture who need training in synthesizable Verilog and use of high-level simulation and synthesis tools 
•Students in VLSI and Electronics who require the use of switch level modeling tools and timing simulation tools 

Organization of Verilog Computer-Based Training: 

The material is organized into different levels, called streams. Each stream targets a particular facet of working with the Verilog language, thereby allowing the user to "jump into" what they are immediately interested in. Streams are divided into flows in which Verilog circuits and coding styles are discussed. 

Contents of the Verilog CBT training: 
•Verilog in a Top-Down Design Environment, covering steps that are taken in a top-down design of a small processor 
•Verilog from Switches to Systems: in a simple to complex fashion, it shows Verilog coding of circuits from switches to systems. It covers complex combinational circuits, sequential blocks, state machines and test benches 
•Verilog Language Reference Manual, covers the standard Verilog language and shows point examples 
•Verilog Synthesizable Circuit Templates: starts with simple synthesizable codes and describes coding styles for complex combinational and sequential circuit synthesis 
•Verilog Formal Syntax Definition: a hyper-linked document shows the formal definition of the IEEE standard Verilog language 
•Verilog Based Simulation and Synthesis: step-by-step getting-started tutorials discuss installation and use of all software programs that are included on the CD 

Verilog Computer-Based Training Software: 

The Verilog CBT software takes advantage of modern multi-media teaching techniques. It uses animations and sound for an effective teaching of a difficult subject. The material is organized and presented with hyperlinked information selection, animation sequences, and different ways of presenting the same information. 

Features of the Verilog CBT software: 
•Uses animations to illustrate design, simulation and synthesis topics 
•Easy to use menus and ample help in each screen 
•Search tool for examples and language topics 
•Easy access to circuit diagrams, Verilog code, testbench and simulation runs 
•Verilog codes of schematic symbols appear as code-tips when selected 
•Bookmark tool marks a page or circuit to go back to 
•Easy access to the electronic manual 
•Step-by-step menu-driven directions form use of simulation and synthesis tools 
•Hyperlinked language reference manual and Verilog syntax summary 

Circuits: 
Array multiplier; Associative memory; Asynchronous control; Bus arbiter; Carry look-ahead adders; Combinational UDPs; Controllers and state machines; Controller testing; Data path testing; Exhaustive testing; External file handling; FIFO queues; Fault tolerant adders; IEEE 1149.1; Iterative circuits; LFSR; LRU; MISR; Memory parts; Pipeline divider; Polynomial calculation; Registers and register files; Sequential UDPs; Shifters and counters; Stacks; System architectures; Switch level logic; Test benches; UART; Wired logic 

Constructs: 
Always statement; Assign statements; Assign and deassign; Blocking assignment; Case statement; Delay control; Display; Event control; Force and release; Fork and join; Function definition; Hierarchical names; If statement; Intra assignment delay; Memory; Net types; Non-blocking assignment; Parameters; Path delay; PLA modeling; Procedural blocks; Setup and hold check; Specify block; Strength modeling; System tasks; Task declaration; Timing check; Timing control; Trireg; Wait statement